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From e95d5ac146d9da8a703a726fe70a9f4ac02ab8b2 Mon Sep 17 00:00:00 2001
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From: Patrick Uiterwijk <patrick@puiterwijk.org>
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Date: Fri, 25 Mar 2016 00:38:45 +0000
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Subject: [PATCH 2/2] net: dsa: mv88e6xxx: Clear the PDOWN bit on setup
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Some of the vendor-specific bootloaders set up this part
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of the initialization for us, so this was never added.
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However, since upstream bootloaders don't initialize the
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chip specifically, they leave the fiber MII's PDOWN flag
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set, which means that the CPU port doesn't connect.
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This patch checks whether this flag has been clear prior
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by something else, and if not make us clear it.
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: Patrick Uiterwijk <patrick@puiterwijk.org>
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---
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drivers/net/dsa/mv88e6xxx.c | 36 ++++++++++++++++++++++++++++++++++++
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drivers/net/dsa/mv88e6xxx.h | 8 ++++++++
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2 files changed, 44 insertions(+)
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diff --git a/drivers/net/dsa/mv88e6xxx.c b/drivers/net/dsa/mv88e6xxx.c
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index 86a2029..50454be 100644
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--- a/drivers/net/dsa/mv88e6xxx.c
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+++ b/drivers/net/dsa/mv88e6xxx.c
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@@ -2296,6 +2296,25 @@ restore_page_0:
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return ret;
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}
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+static int mv88e6xxx_power_on_serdes(struct dsa_switch *ds)
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+{
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+ int ret;
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+
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+ ret = _mv88e6xxx_phy_page_read(ds, REG_FIBER_SERDES, PAGE_FIBER_SERDES,
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+ MII_BMCR);
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+ if (ret < 0)
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+ return ret;
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+
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+ if (ret & BMCR_PDOWN) {
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+ ret &= ~BMCR_PDOWN;
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+ ret = _mv88e6xxx_phy_page_write(ds, REG_FIBER_SERDES,
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+ PAGE_FIBER_SERDES, MII_BMCR,
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+ ret);
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+ }
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+
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+ return ret;
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+}
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+
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static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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@@ -2399,6 +2418,23 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
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goto abort;
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}
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+ /* If this port is connected to a SerDes, make sure the SerDes is not
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+ * powered down.
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+ */
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+ if (mv88e6xxx_6352_family(ds)) {
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+ ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_STATUS);
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+ if (ret < 0)
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+ goto abort;
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+ ret &= PORT_STATUS_CMODE_MASK;
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+ if ((ret == PORT_STATUS_CMODE_100BASE_X) ||
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+ (ret == PORT_STATUS_CMODE_1000BASE_X) ||
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+ (ret == PORT_STATUS_CMODE_SGMII)) {
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+ ret = mv88e6xxx_power_on_serdes(ds);
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+ if (ret < 0)
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+ goto abort;
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+ }
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+ }
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+
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/* Port Control 2: don't force a good FCS, set the maximum frame size to
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* 10240 bytes, disable 802.1q tags checking, don't discard tagged or
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* untagged frames on this port, do a destination address lookup on all
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diff --git a/drivers/net/dsa/mv88e6xxx.h b/drivers/net/dsa/mv88e6xxx.h
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index 9a038ab..26a424a 100644
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--- a/drivers/net/dsa/mv88e6xxx.h
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+++ b/drivers/net/dsa/mv88e6xxx.h
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@@ -28,6 +28,10 @@
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#define SMI_CMD_OP_45_READ_DATA_INC ((3 << 10) | SMI_CMD_BUSY)
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#define SMI_DATA 0x01
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+/* Fiber/SERDES Registers are located at SMI address F, page 1 */
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+#define REG_FIBER_SERDES 0x0f
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+#define PAGE_FIBER_SERDES 0x01
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+
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#define REG_PORT(p) (0x10 + (p))
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#define PORT_STATUS 0x00
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#define PORT_STATUS_PAUSE_EN BIT(15)
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@@ -45,6 +49,10 @@
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#define PORT_STATUS_MGMII BIT(6) /* 6185 */
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#define PORT_STATUS_TX_PAUSED BIT(5)
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#define PORT_STATUS_FLOW_CTRL BIT(4)
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+#define PORT_STATUS_CMODE_MASK 0x0f
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+#define PORT_STATUS_CMODE_100BASE_X 0x8
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+#define PORT_STATUS_CMODE_1000BASE_X 0x9
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+#define PORT_STATUS_CMODE_SGMII 0xa
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#define PORT_PCS_CTRL 0x01
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#define PORT_PCS_CTRL_RGMII_DELAY_RXCLK BIT(15)
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#define PORT_PCS_CTRL_RGMII_DELAY_TXCLK BIT(14)
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--
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2.5.0
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