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From a2858804c7f5f4585b718543236b7ba3b3ec813a Mon Sep 17 00:00:00 2001
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From: Peter Robinson <pbrobinson@gmail.com>
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Date: Mon, 29 Aug 2016 09:14:15 +0100
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Subject: [PATCH] ARM: bcm283x: Add devicetree for the Raspberry Pi 3.
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For now this doesn't support the new hardware present on the Pi 3 (BT,
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wifi, GPIO expander).
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Rebased to the patch that went upstream for ARM64
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Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
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---
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arch/arm/boot/dts/Makefile | 3 +-
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arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 30 ++++++++++++++
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arch/arm/boot/dts/bcm2837.dtsi | 76 +++++++++++++++++++++++++++++++++++
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3 files changed, 108 insertions(+), 1 deletion(-)
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create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts
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create mode 100644 arch/arm/boot/dts/bcm2837.dtsi
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diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
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index faacd52..ec41888 100644
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -69,7 +69,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
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bcm2835-rpi-b-rev2.dtb \
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bcm2835-rpi-b-plus.dtb \
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bcm2835-rpi-a-plus.dtb \
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- bcm2836-rpi-2-b.dtb
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+ bcm2836-rpi-2-b.dtb \
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+ bcm2837-rpi-3-b.dtb
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dtb-$(CONFIG_ARCH_BCM_5301X) += \
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bcm4708-asus-rt-ac56u.dtb \
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bcm4708-asus-rt-ac68u.dtb \
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diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
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new file mode 100644
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index 0000000..7841b72
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--- /dev/null
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+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
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@@ -0,0 +1,30 @@
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+/dts-v1/;
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+#include "bcm2837.dtsi"
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+#include "bcm2835-rpi.dtsi"
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+#include "bcm283x-rpi-smsc9514.dtsi"
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+
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+/ {
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+ compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
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+ model = "Raspberry Pi 3 Model B";
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+
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+ memory {
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+ reg = <0 0x40000000>;
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+ };
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+
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+ leds {
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+ act {
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+ gpios = <&gpio 47 0>;
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+ };
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+
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+ pwr {
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+ label = "PWR";
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+ gpios = <&gpio 35 0>;
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+ default-state = "keep";
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+ linux,default-trigger = "default-on";
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+ };
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+ };
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+};
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+
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+&uart1 {
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+ status = "okay";
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+};
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diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi
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new file mode 100644
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index 0000000..8216bbb
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--- /dev/null
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+++ b/arch/arm/boot/dts/bcm2837.dtsi
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@@ -0,0 +1,76 @@
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+#include "bcm283x.dtsi"
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+
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+/ {
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+ compatible = "brcm,bcm2836";
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+
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+ soc {
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+ ranges = <0x7e000000 0x3f000000 0x1000000>,
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+ <0x40000000 0x40000000 0x00001000>;
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+ dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
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+
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+ local_intc: local_intc {
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+ compatible = "brcm,bcm2836-l1-intc";
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+ reg = <0x40000000 0x100>;
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+ interrupt-parent = <&local_intc>;
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+ };
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+ };
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+
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+ timer {
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+ compatible = "arm,armv7-timer";
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+ interrupt-parent = <&local_intc>;
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+ interrupts = <0>, // PHYS_SECURE_PPI
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+ <1>, // PHYS_NONSECURE_PPI
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+ <3>, // VIRT_PPI
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+ <2>; // HYP_PPI
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+ always-on;
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+ };
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+
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+ cpus: cpus {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ cpu0: cpu@0 {
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+ device_type = "cpu";
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+ compatible = "arm,cortex-a53";
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+ reg = <0>;
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+ enable-method = "spin-table";
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+ cpu-release-addr = <0x0 0x000000d8>;
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+ };
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+
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+ cpu1: cpu@1 {
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+ device_type = "cpu";
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+ compatible = "arm,cortex-a53";
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+ reg = <1>;
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+ enable-method = "spin-table";
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+ cpu-release-addr = <0x0 0x000000e0>;
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+ };
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+
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+ cpu2: cpu@2 {
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+ device_type = "cpu";
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+ compatible = "arm,cortex-a53";
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+ reg = <2>;
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+ enable-method = "spin-table";
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+ cpu-release-addr = <0x0 0x000000e8>;
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+ };
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+
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+ cpu3: cpu@3 {
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+ device_type = "cpu";
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+ compatible = "arm,cortex-a53";
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+ reg = <3>;
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+ enable-method = "spin-table";
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+ cpu-release-addr = <0x0 0x000000f0>;
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+ };
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+ };
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+};
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+
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+/* Make the BCM2835-style global interrupt controller be a child of the
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+ * CPU-local interrupt controller.
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+ */
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+&intc {
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+ compatible = "brcm,bcm2836-armctrl-ic";
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+ reg = <0x7e00b200 0x200>;
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+ interrupt-parent = <&local_intc>;
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+ interrupts = <8>;
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+};
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--
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2.9.3
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