diff --git a/qemu-fix-x86-feature-modifications-for-features-that-set.patch b/qemu-fix-x86-feature-modifications-for-features-that-set.patch new file mode 100644 index 0000000..3578a8e --- /dev/null +++ b/qemu-fix-x86-feature-modifications-for-features-that-set.patch @@ -0,0 +1,60 @@ +From cf6c4edfab98f587405ec61cd727ad70eeb9984e Mon Sep 17 00:00:00 2001 +From: Avi Kivity +Date: Sun, 3 May 2009 17:04:03 +0300 +Subject: [PATCH STABLE 2/3] Fix x86 feature modifications for features that set multiple bits + +QEMU allows adding or removing cpu features by using the syntax '-cpu +feature' +or '-cpu -feature'. Some cpuid features cause more than one bit to be set or +cleared; but QEMU stops after just one bit has been modified, causing the +feature bits to be inconsistent. + +Fix by allowing all feature bits corresponding to a given name to be set. + +Signed-off-by: Avi Kivity +Signed-off-by: Anthony Liguori +Signed-off-by: Glauber Costa +--- + target-i386/helper.c | 13 ++++++++----- + 1 files changed, 8 insertions(+), 5 deletions(-) + +Index: qemu-kvm-0.10.4/target-i386/helper.c +=================================================================== +--- qemu-kvm-0.10.4.orig/target-i386/helper.c ++++ qemu-kvm-0.10.4/target-i386/helper.c +@@ -68,28 +68,31 @@ static void add_flagname_to_bitmaps(char + uint32_t *ext3_features) + { + int i; ++ int found = 0; + + for ( i = 0 ; i < 32 ; i++ ) + if (feature_name[i] && !strcmp (flagname, feature_name[i])) { + *features |= 1 << i; +- return; ++ found = 1; + } + for ( i = 0 ; i < 32 ; i++ ) + if (ext_feature_name[i] && !strcmp (flagname, ext_feature_name[i])) { + *ext_features |= 1 << i; +- return; ++ found = 1; + } + for ( i = 0 ; i < 32 ; i++ ) + if (ext2_feature_name[i] && !strcmp (flagname, ext2_feature_name[i])) { + *ext2_features |= 1 << i; +- return; ++ found = 1; + } + for ( i = 0 ; i < 32 ; i++ ) + if (ext3_feature_name[i] && !strcmp (flagname, ext3_feature_name[i])) { + *ext3_features |= 1 << i; +- return; ++ found = 1; + } +- fprintf(stderr, "CPU feature %s not found\n", flagname); ++ if (!found) { ++ fprintf(stderr, "CPU feature %s not found\n", flagname); ++ } + } + + extern const char *cpu_vendor_string; diff --git a/qemu-make-x86-cpuid-feature-names-available-in-file-scope.patch b/qemu-make-x86-cpuid-feature-names-available-in-file-scope.patch new file mode 100644 index 0000000..0c44b6f --- /dev/null +++ b/qemu-make-x86-cpuid-feature-names-available-in-file-scope.patch @@ -0,0 +1,89 @@ +From d01f3fea76975026f4308bdd214004b9312cd9ea Mon Sep 17 00:00:00 2001 +From: Avi Kivity +Date: Sun, 3 May 2009 17:04:02 +0300 +Subject: [PATCH STABLE 1/3] Make x86 cpuid feature names available in file scope + +To be used later. + +Signed-off-by: Avi Kivity +Signed-off-by: Anthony Liguori +Signed-off-by: Glauber Costa +--- + target-i386/helper.c | 55 +++++++++++++++++++++++++------------------------ + 1 files changed, 28 insertions(+), 27 deletions(-) + +diff --git a/target-i386/helper.c b/target-i386/helper.c +index 8213703..3eb9697 100644 +--- a/target-i386/helper.c ++++ b/target-i386/helper.c +@@ -32,39 +32,40 @@ + + //#define DEBUG_MMU + ++/* feature flags taken from "Intel Processor Identification and the CPUID ++ * Instruction" and AMD's "CPUID Specification". In cases of disagreement ++ * about feature names, the Linux name is used. */ ++static const char *feature_name[] = { ++ "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", ++ "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov", ++ "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */, NULL, "ds" /* Intel dts */, "acpi", "mmx", ++ "fxsr", "sse", "sse2", "ss", "ht" /* Intel htt */, "tm", "ia64", "pbe", ++}; ++static const char *ext_feature_name[] = { ++ "pni" /* Intel,AMD sse3 */, NULL, NULL, "monitor", "ds_cpl", "vmx", NULL /* Linux smx */, "est", ++ "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL, ++ NULL, NULL, "dca", NULL, NULL, NULL, NULL, "popcnt", ++ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ++}; ++static const char *ext2_feature_name[] = { ++ "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", ++ "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall", "mtrr", "pge", "mca", "cmov", ++ "pat", "pse36", NULL, NULL /* Linux mp */, "nx" /* Intel xd */, NULL, "mmxext", "mmx", ++ "fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp", NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow", ++}; ++static const char *ext3_feature_name[] = { ++ "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */, "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse", ++ "3dnowprefetch", "osvw", NULL /* Linux ibs */, NULL, "skinit", "wdt", NULL, NULL, ++ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ++ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ++}; ++ + static void add_flagname_to_bitmaps(char *flagname, uint32_t *features, + uint32_t *ext_features, + uint32_t *ext2_features, + uint32_t *ext3_features) + { + int i; +- /* feature flags taken from "Intel Processor Identification and the CPUID +- * Instruction" and AMD's "CPUID Specification". In cases of disagreement +- * about feature names, the Linux name is used. */ +- static const char *feature_name[] = { +- "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", +- "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov", +- "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */, NULL, "ds" /* Intel dts */, "acpi", "mmx", +- "fxsr", "sse", "sse2", "ss", "ht" /* Intel htt */, "tm", "ia64", "pbe", +- }; +- static const char *ext_feature_name[] = { +- "pni" /* Intel,AMD sse3 */, NULL, NULL, "monitor", "ds_cpl", "vmx", NULL /* Linux smx */, "est", +- "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL, +- NULL, NULL, "dca", NULL, NULL, NULL, NULL, "popcnt", +- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +- }; +- static const char *ext2_feature_name[] = { +- "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", +- "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall", "mtrr", "pge", "mca", "cmov", +- "pat", "pse36", NULL, NULL /* Linux mp */, "nx" /* Intel xd */, NULL, "mmxext", "mmx", +- "fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp", NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow", +- }; +- static const char *ext3_feature_name[] = { +- "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */, "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse", +- "3dnowprefetch", "osvw", NULL /* Linux ibs */, NULL, "skinit", "wdt", NULL, NULL, +- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +- }; + + for ( i = 0 ; i < 32 ; i++ ) + if (feature_name[i] && !strcmp (flagname, feature_name[i])) { +-- +1.5.6.6 + diff --git a/qemu-trim-cpu-features-not-supported-by-kvm.patch b/qemu-trim-cpu-features-not-supported-by-kvm.patch new file mode 100644 index 0000000..d6b69bd --- /dev/null +++ b/qemu-trim-cpu-features-not-supported-by-kvm.patch @@ -0,0 +1,67 @@ +From 3b944bee95c6a5ee561acfc4c4d75d8cc971a567 Mon Sep 17 00:00:00 2001 +From: Avi Kivity +Date: Sun, 3 May 2009 17:04:04 +0300 +Subject: [PATCH STABLE 3/3] kvm: Trim cpu features not supported by kvm + +Remove cpu features that are not supported by kvm from the cpuid features +reported to the guest. + +Signed-off-by: Avi Kivity +Signed-off-by: Anthony Liguori +Signed-off-by: Glauber Costa +--- + target-i386/helper.c | 31 ++++++++++++++++++++++++++++++- + 1 files changed, 30 insertions(+), 1 deletions(-) + +diff --git a/target-i386/helper.c b/target-i386/helper.c +index 1433857..6af5d23 100644 +--- a/target-i386/helper.c ++++ b/target-i386/helper.c +@@ -93,6 +93,21 @@ static void add_flagname_to_bitmaps(char *flagname, uint32_t *features, + } + } + ++static void kvm_trim_features(uint32_t *features, uint32_t supported, ++ const char *names[]) ++{ ++ int i; ++ uint32_t mask; ++ ++ for (i = 0; i < 32; ++i) { ++ mask = 1U << i; ++ if ((*features & mask) && !(supported & mask)) { ++ printf("Processor feature %s not supported by kvm\n", names[i]); ++ *features &= ~mask; ++ } ++ } ++} ++ + typedef struct x86_def_t { + const char *name; + uint32_t level; +@@ -1672,7 +1687,21 @@ CPUX86State *cpu_x86_init(const char *cpu_model) + #ifdef USE_KQEMU + kqemu_init(env); + #endif +- if (kvm_enabled()) ++ if (kvm_enabled()) { + kvm_init_vcpu(env); ++ kvm_trim_features(&env->cpuid_features, ++ kvm_arch_get_supported_cpuid(env, 1, R_EDX), ++ feature_name); ++ kvm_trim_features(&env->cpuid_ext_features, ++ kvm_arch_get_supported_cpuid(env, 1, R_ECX), ++ ext_feature_name); ++ kvm_trim_features(&env->cpuid_ext2_features, ++ kvm_arch_get_supported_cpuid(env, 0x80000001, R_EDX), ++ ext2_feature_name); ++ kvm_trim_features(&env->cpuid_ext3_features, ++ kvm_arch_get_supported_cpuid(env, 0x80000001, R_ECX), ++ ext3_feature_name); ++ } ++ + return env; + } +-- +1.5.6.6 + diff --git a/qemu.spec b/qemu.spec index 6ba3503..36ab40f 100644 --- a/qemu.spec +++ b/qemu.spec @@ -1,7 +1,7 @@ Summary: QEMU is a FAST! processor emulator Name: qemu Version: 0.10.4 -Release: 4%{?dist} +Release: 5%{?dist} # Epoch because we pushed a qemu-1.0 package Epoch: 2 License: GPLv2+ and LGPLv2+ and BSD @@ -33,6 +33,10 @@ Patch17: qemu-dma-aio-cancellation1.patch Patch18: qemu-dma-aio-cancellation2.patch Patch19: qemu-dma-aio-cancellation3.patch Patch20: qemu-dma-aio-cancellation4.patch +Patch21: qemu-make-x86-cpuid-feature-names-available-in-file-scope.patch +Patch22: qemu-fix-x86-feature-modifications-for-features-that-set.patch +Patch23: qemu-trim-cpu-features-not-supported-by-kvm.patch + BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n) BuildRequires: SDL-devel zlib-devel which texi2html gnutls-devel cyrus-sasl-devel @@ -233,6 +237,9 @@ such as kvmtrace and kvm_stat. %patch18 -p1 %patch19 -p1 %patch20 -p1 +%patch21 -p1 +#%patch22 -p1 +#%patch23 -p1 %build # systems like rhel build system does not have a recent enough linker so @@ -475,6 +482,9 @@ fi %{_mandir}/man1/qemu-img.1* %changelog +* Mon May 18 2009 Glauber Costa - 2:0.10.4-5 +- Backport cpuid trimming from upstream (#499596) + * Thu May 14 2009 Mark McLoughlin - 2:0.10.4-4 - Cherry pick more DMA AIO cancellation fixes from upstream (#497170)