From 8c99f657824e483c59745cc4c0c93240ad9fe24a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michel=20D=C3=A4nzer?= Date: Mon, 17 Oct 2016 18:48:44 +0900 Subject: [PATCH xserver v2 1/7] DRI2: Sync radeonsi_pci_ids.h from Mesa MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fixes DRI2 client driver name mapping for newer AMD GPUs with the modesetting driver, allowing the DRI2 extension to initialize. Signed-off-by: Michel Dänzer Reviewed-by: Alex Deucher Signed-off-by: Hans de Goede --- hw/xfree86/dri2/pci_ids/radeonsi_pci_ids.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/hw/xfree86/dri2/pci_ids/radeonsi_pci_ids.h b/hw/xfree86/dri2/pci_ids/radeonsi_pci_ids.h index 4df8e9d..20c1583 100644 --- a/hw/xfree86/dri2/pci_ids/radeonsi_pci_ids.h +++ b/hw/xfree86/dri2/pci_ids/radeonsi_pci_ids.h @@ -184,12 +184,24 @@ CHIPSET(0x7300, FIJI_, FIJI) CHIPSET(0x67E0, POLARIS11_, POLARIS11) CHIPSET(0x67E1, POLARIS11_, POLARIS11) +CHIPSET(0x67E3, POLARIS11_, POLARIS11) +CHIPSET(0x67E7, POLARIS11_, POLARIS11) CHIPSET(0x67E8, POLARIS11_, POLARIS11) CHIPSET(0x67E9, POLARIS11_, POLARIS11) CHIPSET(0x67EB, POLARIS11_, POLARIS11) +CHIPSET(0x67EF, POLARIS11_, POLARIS11) CHIPSET(0x67FF, POLARIS11_, POLARIS11) CHIPSET(0x67C0, POLARIS10_, POLARIS10) +CHIPSET(0x67C1, POLARIS10_, POLARIS10) +CHIPSET(0x67C2, POLARIS10_, POLARIS10) +CHIPSET(0x67C4, POLARIS10_, POLARIS10) +CHIPSET(0x67C7, POLARIS10_, POLARIS10) +CHIPSET(0x67C8, POLARIS10_, POLARIS10) +CHIPSET(0x67C9, POLARIS10_, POLARIS10) +CHIPSET(0x67CA, POLARIS10_, POLARIS10) +CHIPSET(0x67CC, POLARIS10_, POLARIS10) +CHIPSET(0x67CF, POLARIS10_, POLARIS10) CHIPSET(0x67DF, POLARIS10_, POLARIS10) CHIPSET(0x98E4, STONEY_, STONEY) -- 2.9.3