From b56e8220a39695c4f84368552c26d95a30921aa6 Mon Sep 17 00:00:00 2001
From: Peter Lemenkov <lemenkov@gmail.com>
Date: Tue, 21 Sep 2010 17:51:08 +0400
Subject: [PATCH 5/8] Simplify hwaccess.c

This file is saturated with superfluous ifdefs arranged into
several nested levels. This in turn adds additional complexity
to process of adding another architecture.

I re-arranged all ifdef blocks and killed duplicated function
definitions. Also I added define(__amd64) to the list of x86-arches.

Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
---
 hwaccess.c | 87 +++++++++++++++++++-------------------------------------------
 hwaccess.h | 18 +------------
 2 files changed, 27 insertions(+), 78 deletions(-)

diff --git a/hwaccess.c b/hwaccess.c
index e1195de..5242e5f 100644
--- a/hwaccess.c
+++ b/hwaccess.c
@@ -32,46 +32,59 @@
 #include "flash.h"
 #include "hwaccess.h"
 
-#if defined(__i386__) || defined(__x86_64__)
+#if defined(__i386__) || defined(__x86_64__) || defined(__amd64)
+#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
+int io_fd;
+#endif
+#endif
 
-/* sync primitive is not needed because x86 uses uncached accesses
- * which have a strongly ordered memory model.
- */
 static inline void sync_primitive(void)
 {
-}
-
-#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
-int io_fd;
+/* sync primitive is needed only on PowerPC because
+ * x86 uses uncached accesses which have a strongly ordered memory model
+ * /dev/mem on MIPS uses uncached accesses in mode 2 which has a strongly ordered memory model.
+ */
+#if defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__)
+	/* Prevent reordering and/or merging of reads/writes to hardware.
+	 * Such reordering and/or merging would break device accesses which
+	 * depend on the exact access order.
+	 */
+	asm("eieio" : : : "memory");
 #endif
+}
 
 int release_io_perms(void *p)
 {
+/* PCI port I/O is not yet implemented on PowerPC or MIPS. */
+#if defined(__i386__) || defined(__x86_64__) || defined(__amd64)
 #if defined(__DJGPP__) || defined(__LIBPAYLOAD__)
 #else
-#if defined (__sun) && (defined(__i386) || defined(__amd64))
+#if defined (__sun)
 	sysi86(SI86V86, V86SC_IOPL, 0);
 #elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__)
 	close(io_fd);
-#else 
+#else
 	iopl(0);
 #endif
 #endif
+#endif
 	return 0;
 }
 
 /* Get I/O permissions with automatic permission release on shutdown. */
 int rget_io_perms(void)
 {
+/* PCI port I/O is not yet implemented on PowerPC or MIPS. */
+#if defined(__i386__) || defined(__x86_64__) || defined(__amd64)
 #if defined(__DJGPP__) || defined(__LIBPAYLOAD__)
 	/* We have full permissions by default. */
 	return 0;
 #else
-#if defined (__sun) && (defined(__i386) || defined(__amd64))
+#if defined (__sun)
 	if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {
 #elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined (__DragonFly__)
 	if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
-#else 
+#else
 	if (iopl(3) != 0) {
 #endif
 		msg_perr("ERROR: Could not get I/O privileges (%s).\n"
@@ -87,56 +100,8 @@ int rget_io_perms(void)
 	}
 	return 0;
 #endif
-}
-
-#elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__)
-
-static inline void sync_primitive(void)
-{
-	/* Prevent reordering and/or merging of reads/writes to hardware.
-	 * Such reordering and/or merging would break device accesses which
-	 * depend on the exact access order.
-	 */
-	___asm___ volatile ("eieio" : : : "memory");
-}
-
-/* PCI port I/O is not yet implemented on PowerPC. */
-int rget_io_perms(void)
-{
-	return 0;
-}
-
-#elif defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips)
-
-/* sync primitive is not needed because /dev/mem on MIPS uses uncached accesses
- * in mode 2 which has a strongly ordered memory model.
- */
-static inline void sync_primitive(void)
-{
-}
-
-/* PCI port I/O is not yet implemented on MIPS. */
-int rget_io_perms(void)
-{
-	return 0;
-}
-
-#elif defined (__arm__)
-
-static inline void sync_primitive(void)
-{
-}
-
-int rget_io_perms(void)
-{
-	return 0;
-}
-
-#else
-
-#error Unknown architecture
-
 #endif
+}
 
 void mmio_writeb(uint8_t val, void *addr)
 {
diff --git a/hwaccess.h b/hwaccess.h
index dc52118..3cf90be 100644
--- a/hwaccess.h
+++ b/hwaccess.h
@@ -204,7 +204,7 @@ cpu_to_be(64)
     #define off64_t off_t
     #define lseek64 lseek
 #endif
-#if defined (__sun) && (defined(__i386) || defined(__amd64))
+#if defined (__sun)
   /* Note different order for outb */
   #define OUTB(x,y) outb(y, x)
   #define OUTW(x,y) outw(y, x)
@@ -324,22 +324,6 @@ int libpayload_wrmsr(int addr, msr_t msr);
 #define wrmsr libpayload_wrmsr
 #endif
 
-#elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__)
-
-/* PCI port I/O is not yet implemented on PowerPC. */
-
-#elif defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips)
-
-/* PCI port I/O is not yet implemented on MIPS. */
-
-#elif defined(__arm__)
-
-/* Non memory mapped I/O is not supported on ARM. */
-
-#else
-
-#error Unknown architecture, please check if it supports PCI port IO.
-
 #endif
 #endif
 
-- 
1.7.11.5